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There are a number of available positions across ASIC design, verification and layout/physical implementation. You will have an excellent academic record with at least 1st or 2:1 qualification and 2-10 years experience within either RTL / verification or layout. You will have the aptitude and willingness to participate in all stages of the ASIC flow. Processor design experience would be particularly useful.
This is a rare opportunity to join a world class design team, please call to discuss further
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